In general, devices such as silicon controlled rectifiers (SCR), double diffusion metal-oxide-semiconductor (DMOS) transistors, and bipolar junction transistors (BJT) are used as high-voltage electrostatic discharge (ESD) protection devices. A BJT consists of an emitter, base, and collector, and can be divided into a horizontal BJT and a vertical BJT, depending on a direction of charge transfer.
FIG. 1 is a cross sectional view illustrating a conventional ESD protection device including a planar PNP transistor structure.
Referring to FIG. 1, a conventional ESD protection device includes a p-type semiconductor substrate 10, a first well 15 formed by implanting p-type impurities into an upper left surface portion of the semiconductor substrate 10, and a second well 20 formed by implanting n-type impurities into an upper right surface portion of the semiconductor substrate 10.
A region where the first well 15 is formed corresponds to a collector region, and a region where the second well 20 is formed corresponds to a base region and an emitter region. P-type impurities are implanted into the first well 15 to form a collector 25 of P+ conductivity, whereas p-type impurities are implanted into one side of the second well 20, adjacent to the collector 25 to form an emitter 30 of P+ conductivity. Further, n-type impurities are implanted into the other side of the second well 20 to form a base 35 of N+ conductivity.
Element isolation layers 40 are provided between the collector 25, the emitter 30 and the base 35 to separate the collector 25, the emitter 30 and the base 35 from one another.
The ESD protection device 1 has a structure symmetrical with respect to the base 35. The emitter 30 and the base 35 are connected to a VDD (positive) terminal, and the collector 25 is connected to a ground terminal in order to apply the ESD protection device 1 for protection of an internal device from an electrostatic discharge.
The ESD protection device 1 is used to protect a semiconductor device from electrostatic discharge. When the electrostatic voltage is applied, the ESD protection device 1 quickly pulls out an electrostatic current to the ground terminal. Therefore, in order for the ESD protection device 1 to function as an electrostatic discharge protection device efficiently, both a first trigger voltage at which the ESD protection device 1 starts to operate and a second trigger voltage at which the ESD protection device is destroyed due to leakage current and heat generation must be lower than the breakdown voltage of the internal circuit. In addition, a holding voltage which is the voltage dropped after the ESD protection device 1 is triggered, should be higher than an operation voltage of the internal circuit.
As described above, the ESD protection device 1 based on the PNP transistor has a high holding voltage and thus has a high utilization degree as an electrostatic protection device for a high voltage. However, since a value of on-resistance Ron is relatively high due to the nature of the structure, the second trigger voltage may exceed the breakdown voltage of the internal circuit. Thus, it may be required to enlarge the area of the ESD protection device 1 in order to lower the value of the on-resistance Ron for normal operation of the ESD protection device 1 in the design area. As a result, there is a disadvantage that the size of the ESD protection element 1 becomes larger.